Design of Full-Parallel Non Binary LDPC Decoder
| dc.contributor.author | Bali, Cherif | |
| dc.contributor.other | Taghi, M., Directeur de thèse | |
| dc.date.accessioned | 2021-01-24T08:02:52Z | |
| dc.date.available | 2021-01-24T08:02:52Z | |
| dc.date.issued | 2017 | |
| dc.description | Mémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017 | fr_FR |
| dc.description.abstract | Low Density Parity-Check (LDPC) codes have been successfully included in numerous wire-less communication standards, since they achieve error correction performance very close to the Shannon limit. Non-Binary LDPC codes has better performance than the binary LDPC codes, In this thesis, we focused on the design and implementation of efficient architecture of the NB-LDPC decoder basic blocks using the Min-Max algorithm. In order to provide flexible decoder. Then proposing a full-parallel design for a hight thoughput communications,the design and implementation of the decoder components are detailed. | fr_FR |
| dc.identifier.other | S000122 | |
| dc.identifier.uri | https://repository.enp.edu.dz/handle/123456789/6870 | |
| dc.language.iso | en | fr_FR |
| dc.title | Design of Full-Parallel Non Binary LDPC Decoder | fr_FR |
| dc.type | Thesis | fr_FR |