Implementation of artificial neural on an FPGA board application on induction motor speed control

Abstract

: In many engineering applications, parallel distributed systems that satisfy the real-time constraint are strongly needed. Artificial neural networks (ANNs) represent highly parallel distributed systems that were directly inspired from the human brain. Thus they are appropriate for such applications. However the implementation of these networks proved to be quite challenging. It requires parallelism and flexibility. Among all types of circuits, FPGAs have proved to be the most convenient for that. But designing ANNs architectures to be implemented on FPGAs have some issues to be dealt with, like how to balance between numeric precision (required for accuracy), parallelism, and resources limitations. In this work we have proposed a C++ based application that generates optimized ANNs descriptions. We started first by introducing generalities on ANNs in chapter one. We devoted the second chapter to present an overview on the FPGA’s architecture. In chapter three we briefly presented the arithmetic issues in ANNs implementations. After that, we presented both architectures of a single neuron, and the whole ANN. we ended this chapter by presenting the way we coded our application and the principle of its functioning. ModelSim simulations where performed and they showed the good functioning of neural networks generated by the application. In the last chapter we have used our application to generate 6 ANNs that were used in a new induction motor control technique called ANN SHE. Simulations were performed as well and results were good and as expected.