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dc.contributor.authorBali, Cherif-
dc.contributor.otherTaghi, M., Directeur de thèse-
dc.date.accessioned2021-01-24T08:02:52Z-
dc.date.available2021-01-24T08:02:52Z-
dc.date.issued2017-
dc.identifier.otherS000122-
dc.identifier.urihttp://repository.enp.edu.dz/xmlui/handle/123456789/6870-
dc.descriptionMémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017fr_FR
dc.description.abstractLow Density Parity-Check (LDPC) codes have been successfully included in numerous wire-less communication standards, since they achieve error correction performance very close to the Shannon limit. Non-Binary LDPC codes has better performance than the binary LDPC codes, In this thesis, we focused on the design and implementation of efficient architecture of the NB-LDPC decoder basic blocks using the Min-Max algorithm. In order to provide flexible decoder. Then proposing a full-parallel design for a hight thoughput communications,the design and implementation of the decoder components are detailed.fr_FR
dc.language.isoenfr_FR
dc.titleDesign of Full-Parallel Non Binary LDPC Decoderfr_FR
dc.typeThesisfr_FR
Collection(s) :Département Electronique

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