Veuillez utiliser cette adresse pour citer ce document :
http://repository.enp.edu.dz/jspui/handle/123456789/7093
Affichage complet
Élément Dublin Core | Valeur | Langue |
---|---|---|
dc.contributor.author | Askar, Siradjeddine | - |
dc.contributor.other | Larbes, Chérif, Directeur de thèse | - |
dc.contributor.other | Kherif, Omar, Directeur de thèse | - |
dc.date.accessioned | 2021-01-25T10:48:51Z | - |
dc.date.available | 2021-01-25T10:48:51Z | - |
dc.date.issued | 2020 | - |
dc.identifier.other | EP00242 | - |
dc.identifier.uri | http://repository.enp.edu.dz/xmlui/handle/123456789/7093 | - |
dc.description | Mémoire de Projet de Fin d’Études : Électronique : Alger, École Nationale Polytechnique : 2020 | fr_FR |
dc.description.abstract | This thesis deals with the control of a five-level cascaded H-Bridge multilevel inverter. It also offers a real-time implementation of various pulse width modulation (PWM) techniques. These include level shifted (LS-PWM) and phase shifted (PS-PWM) modulations, which are implemented on a microcontroller. A comparative study is carried out between these proposed techniques, including the conventional control technique (full wave). Then, simulations are carried out in a MATLAB / Simulink environment. Subsequently, a parametric analysis is carried out in order to study the effect of certain parameters such as the modulation index, the switching frequency, etc. The asynchronous machine is used as a load for the output of the inverter whose variation of currents, torque and speed is presented. On a practical level, experiments are carried out in order to validate the simulation results. The microcontroller used is an STM32F103 attached to a nucleo board, and it is used to generate the gate control signals of the inverter switches. | fr_FR |
dc.language.iso | en | fr_FR |
dc.subject | Multilevel inverter | fr_FR |
dc.subject | PWM control strategies | fr_FR |
dc.subject | STM32F103 board | fr_FR |
dc.subject | Parametric analysis | fr_FR |
dc.title | Implementation of real-time PWM on STM32F103 for the control of five-level cascaded H-Bridge multilevel inverter | fr_FR |
dc.type | Thesis | fr_FR |
Collection(s) : | Département Electronique |
Fichier(s) constituant ce document :
Fichier | Description | Taille | Format | |
---|---|---|---|---|
ASKAR.Siradjeddine.pdf | PN01720 | 4.57 MB | Adobe PDF | Voir/Ouvrir |
Tous les documents dans DSpace sont protégés par copyright, avec tous droits réservés.