Hardware architecture and IP-core development for real-time subspace-based audio cryptography in an FPGA-SoC

Abstract

This work explores real-time audio encryption using Subspace-Based Encryption (SBE), which embeds the plaintext into a signal subspace and confines a non-linearly coupled masking noise to its orthogonal subspace, thereby enabling perfect recovery via a single linear projection. A full-duplex system is implemented on two Zybo Z7-20 FPGA boards, with a hybrid ChaCha20/RO-TRNG key generation validated against NIST SP 800-22 suite, and a fixed-point arithmetic pipeline using a multiplier-free CORDIC cascade and an algebraic zero-leakage projection. The system meets timing closure at 125 MHz and produces ciphertext indistinguishable from white noise, with SNR between 87 and 109 dB and near-zero plaintext correlation.